How to interface something to the PE6502.. Part 1

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Moderator: Corneleous

How to interface something to the PE6502.. Part 1

Postby Corneleous » Sun Dec 27, 2020 5:16 pm

Folks,
It's been a LONG time! I figured I'd add to the info collective, with a way to interface something (perhaps, a couple of LEDs) to our PE6502, through the expansion header.

The big picture (you might want to look at the PE6502 schematic for this discussion): The computer can essentially run instructions in its CPU (65C02 in our case). Then, the CPU will communicate to RAM, or ROM, or the display (attached via PIA chip->propeller->composite display adapter) by going over it's system bus (literally wires that connect address lines and data lines).. All devices connected to the Data and Address bus are literally connecting their data lines together, and their address lines together. For example, there is continuity on the PE6502 RAM chip D0, ROM chip D0, and CPU chip D0. Likewise for D1 of these chips, D2-D7, and A0-A15. The CPU can talk to other devices that we add over the expansion header too!

SO! How does the processor get the attention of say the RAM chip, when it wants to talk to RAM, and not the ROM chip? Well, first of all, everything has an address. If you use your neighborhood as an example, your mail is sent to your house by using your street address. Same thing with computers; the PE6502 reserves address space from $0000 to $7FFF for RAM locations, and address range $8000 to $9FFF and also $E000 to $FFFF are in ROM. In the PE6502, $A000-$C000 for example, are un-reserved currently (you can use these with your add-ons if you like!)

For a second, consider these addresses we've just listed for RAM and ROM. Using a calculator convert these addresses to binary (most computers can have "Programmer's Mode" set in their desktop calculator- but if this is not available, even google can convert for you!) Let's make it easy: Pick the last address in RAM (in HEX: $7FFF) and the first address in ROM ($8000) and let's convert them to binary, and then look at them:
$7FFF: 0111 1111 1111 1111
$8000: 1000 0000 0000 0000

Now remember, our computer "sees" a 1 as a "high" signal (let's grossly simplify here and just say 5 volts) and a 0 as a "low" signal (zero volts). Also, remember that while our computer has an 8-bit data bus, it has a 16-bit address bus. See the difference between those two binary numbers above? If we wanted to just take a huge shortcut and determine if something was in RAM or in ROM, we could just look at the most significant bit A15 (which is 0 for $7FFF, and 1 for $8000, when converted to binary which our computers speak!) If you look at the PE6502 schematic, at the U4 RAM chip lines 20 (chip enable) and 22 (output enable - refer to the SRAM 62256 datasheet http://6502.org/users/alexis/62256.pdf for more info), you'll notice a little line over both OE and CE abbreviations.. That line means these two lines are activated when signal sent to them is low. Let's put this all together- the PE6502 connects these two signals to the A15 address bus line, which is 0 (or signal low) when the CPU is attempting to address anything below $8000, right? So, we can see, the RAM chip is enabled at these RAM addresses (and NOT enabled outside the RAM address range.) Likewise, the U3 ROM Chip Enable and Output Enable lines are set (using "GLUE LOGIC" chips U5, U6, U8 and U7) to disable the ROM chip in the same address range where the RAM is enabled, but also to ENABLE ROM in only the specific address ranges ($8000-$9FFF, and $E000-$FFFF) where we want the computer to reference ROM but not any of the other non-RAM and non-ROM (like the range $A000-$DFFF, which except for the PIA area in $D000 can be used for other stuff, like LEDs.)

More about GLUE logic:
The RAM chip enable strategy is very easy, because when we converted the HEX address range to the BINARY numbers our computer uses, the A15 bit can be used to very simply indicate RAM or not-RAM locations. A less simple (but still not too bad once you see what it is doing) strategy had to be used for ROM since we only want it turned on in a couple of smaller areas of the top half of the 16-bit address range the 65C02 can handle. The combination of a decoder chip (has 6 possible input lines from the address bus, and can output signals on 8 different pins) and NAND, OR, and INVERTER TTL logic chips to ultimately set a "ROM_ON" signal either low or high. We connect this ROM_ON signal to the ROM chip OE and CE lines, so that the ROM chip knows when the 65C02 is talking to it. (And I'm just giving you a quick-n-dirty here, I highly recommend you bolster this info with better, more detailed info to be found on the internet, in books, and also in datasheets for the chips we're discussing here!)

Specifically:
[*]U5: 74HCT138 (3-to-8 DECODER): https://www.ti.com/lit/ds/symlink/sn74hct138.pdf?ts=1609106325157&ref_url=https%253A%252F%252Fwww.google.com%252F
[*]U6: 74LS00 (Quad NAND): https://www.ti.com/lit/ds/sdls025d/sdls025d.pdf?ts=1609098432743&ref_url=https%253A%252F%252Fwww.google.com%252F
[*]U8: 74LS32 (Quad OR): https://www.ti.com/lit/ds/symlink/sn74ls32.pdf
[*]U7: 74LS04 (Hex INVERTER): https://www.ti.com/lit/ds/symlink/sn74ls04.pdf

Stay tuned for Part 2, where we'll try to put all of this info to practical use, to build a circuit on a breadboard, with GLUE logic, and some LEDs that we can ultimately control with code from the PE6502.
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Jason Putnam
putnamelectronics
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Corneleous
 
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